AMD’s MI455X and Helios Signal a System-Level Push Against Nvidia

Lead

At its Advancing AI 2026 event, AMD unveiled the Instinct MI455X accelerator and the Helios rack-scale system. The headline phrase is “2nm GPU,” but the more important story is broader: AMD is trying to move from selling accelerators to delivering rack-level AI infrastructure that can compete with Nvidia’s end-to-end platform.

Key points

• The 2nm label needs context. MI455X is a complex chiplet-based product with around 320 billion transistors. Its four XCD compute chiplets use TSMC’s N2 process, while the FCD and I/O components use N3P. In other words, it is better described as one of the first data-center GPUs with 2nm compute chiplets, not a package made entirely on 2nm.
• Memory may matter more than peak FLOPS. Each MI455X carries 432GB of HBM4. A Helios rack combines 72 GPUs for roughly 31TB of total GPU memory. For long-context inference, agent workloads, high concurrency and mixture-of-experts models, that memory footprint can be more operationally meaningful than theoretical compute alone.
• Helios is a rack, not just a card. A Helios system includes 72 MI455X GPUs and 18 EPYC Venice CPUs, with about 2.9 ExaFLOPS of FP4 compute and 1.4 ExaFLOPS of FP8 compute. AMD is leaning on OCP rack concepts, UALink, UALoE, Ultra Ethernet-related technologies and Pensando networking silicon.
• The customer list matters. OpenAI, Meta, Microsoft, Oracle and Anthropic all appear in AMD’s ecosystem narrative, signaling that major AI players want credible alternatives to a single dominant supplier.

Why it matters

Nvidia’s moat has never been only the GPU. It spans NVLink, NVSwitch, InfiniBand, Spectrum-X, CUDA, libraries, profilers, deployment tools and years of operational learning. AMD’s answer is more open: give cloud providers and OEMs more room to customize systems around open standards. That can be attractive, but it also increases the burden of integration, validation and accountability.

Software remains the hardest part. AMD argues that large customers increasingly program at the PyTorch, vLLM and Triton layers, making CUDA less visible. That is partly true: many AI teams no longer write CUDA kernels directly for every workload. But CUDA is not merely an API. It is a deep stack of libraries, compilers, runtimes, debugging tools and performance practices already embedded inside modern AI infrastructure.

So MI455X and Helios should be seen as AMD’s admission ticket, not the final verdict. The company still needs to prove three things: that it can deliver 2nm compute chiplets, HBM4 and advanced packaging at scale; that Helios can turn theoretical bandwidth and compute into real model throughput and lower cost per token; and that ROCm can become a routine production platform rather than a joint engineering project for every major deployment. If AMD clears those hurdles, the AI accelerator market may finally become less one-sided.

Source: InfoQ 中文